1. Field of the Invention
The present invention relates to an image pickup apparatus such as a solid state image sensing device, a charge-coupled device (CCD) or the like for use with a video camera or the like.
2. Description of the Prior Art
In solid state image sensing devices (CCDs) for use with a video camera, for example, signals of picked-up images from respective pixels are sequentially transferred to the vertical direction at a horizontal scanning timing and then transferred at high speed in the horizontal direction with a timing of pixel clock by a horizontal transfer register (CCD) provided at the end thereof, thereby being delivered to the outside.
In the above solid state image sensing devices, the horizontal transfer register is driven by two-phase clock signals, for example, in order to transfer the signals at high speed. In this case, two-phase clock signals .phi..sub.Ha and .phi..sub.Hb have low frequency components, respectively, as shown in FIG. 1 of the accompanying drawings.
On the other hand, in the above horizontal transfer register, an equivalent load of the circuit (CCD) has a coupling capacitance C.sub.1 as seen from the clock signals .phi..sub.Ha, .phi..sub.Hb as shown in FIG. 2 of the accompanying drawings. In this case, when signals of opposite phases are supplied from respective ends of the coupling capacitance C.sub.1, an effective coupling capacitance as seen from one end thereof is increased twice.
That is, if .phi..sub.Ha =V, then .phi..sub.Hb =-V. Thus, a current I.sub.a, which flows through the coupling capacitance C.sub.1 is expressed as: ##EQU1## Accordingly, if the capacitance of C.sub.1 as seen from the clock .phi..sub.Ha side is taken as Ca, then the following equation is established: ##EQU2## Thus, Ca=2C.sub.1 is established and hence the coupling capacitance is increased twice.
On the other hand, as shown in FIG. 3 of the accompanying drawings, the above two-phase clock signals .phi..sub.Ha, .phi..sub.Hb are respectively fixed (stopped) to high and low potentials during the vertical blanking period. Then, the two-phase clocks .phi..sub.Ha, .phi..sub.Hb are simultaneously inverted (actuated) at the beginning of the horizontal scanning period so that the low frequency components of these two-phase clocks .phi..sub.Ha, .phi..sub.Hb are changed in potential in an opposite phase fashion as shown in FIG. 4A of the accompanying drawings.
Accordingly, in the above two-phase clock signals .phi..sub.Ha, .phi..sub.Hb, apparent coupling capacitances of the low frequency components thereof are increased twice. Hence, a load capacitance of (C.sub.2 +2C.sub.1) is applied to the low frequency components. Thus, when a driving force of the clock driver is not sufficient, the low frequency components are affected by the frequency characteristics.
More specifically, when the driving force of the clock driver is not sufficient, the effective amplitude of the waveform of the drive signal for the CCD is lowered at the starting end of the horizontal scanning period as shown in FIG. 4B of the accompanying drawings. If the effective amplitude of the driving waveform is lowered as described above, then a transfer failure is caused and a vertical smear noise occurs. As a consequence, the quality of an image is deteriorated considerably.
On the other hand, if the driving force of the clock driver is increased, then the effective amplitude of the driving waveform is increased not only at the starting end of the horizontal scanning period but also a whole driving power is increased, which considerably increases the amount of electric power consumption.